dual-channel, 14-bit ccd signal processor with precision timing ? core ad9973 rev. spa information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006C2007 analog devices, inc. all rights reserved. features 1.8 v analog and digital core supply voltage serial data link with reduced range lvds outputs correlated double sampler (cds) with ?3 db, 0 db, +3 db, +6 db gain 6 db to 42 db, 10-bit variable gain amplifier (vga) 14-bit, 65 mhz analog-to-digital converter black level clamp with variable level control complete on-chip timing generator precision timing core with 240 ps resolution @ 65 mhz on-chip 3 v horizontal and rg drivers 6 mm 6 mm, 84-ball csp_bga package applications professional hdtv camcorders professional, high-end digital cameras broadcast cameras industrial high speed cameras general description the ad9973 is a highly integrated dual channel ccd signal processor for high speed digital video camera applications. each channel is specified at pixel rates of up to 65 mhz, and consists of a complete analog front end with analog-to-digital conversion, combined with a programmable timing driver. the precision timing core allows adjustment of high speed clocks with 240 ps resolution at 65 mhz operation. the ad9973 also contains a reduced range lvds interface for the dual-channel data outputs. each analog front end (afe) includes black level clamping, cds, vga, and a 65 msps, 14-bit analog-to-digital converter. the timing driver provides the high speed ccd clock drivers for rg, hl, and h1 to h4. operation is programmed using a 3-wire serial interface. packaged in a space-saving 6 mm 6 mm, 84-ball csp_bga, the ad9973 is specified over an operating temperature range of ?25c to +85c. functional block diagram ad9973 sync generator precision timing core internal clocks horizontal drivers rg_b rg_a hla, h1a to h4a 5 hlb, h1b to h4b 5 hd_a vd_a hl_a hl_b hd_b vd_b internal registers sl_a sdata_a sl_b sdata_b sck_a sck_b cli_a cli_b clamp ccdinp_a 6db ~ 42db vga cds clamp ccdinp_b ldo_out_a ldo_out_b 6db ~ 42db vga cds reft_b refb_b vref_b reft_a refb_a vref_a ?3db, 0db, +3db, +6db ?3db, 0db, +3db, +6db 1.8v output ldo a 1.8v output ldo b reduced range lvds interface dout0n_a dout0p_a dout1p_a dout1n_a dout0p_b dout0n_b dout1p_b dout1n_b tclkp_a tclkn_a tclkp_b tclkn_b ccdinm_a ccdinm_b adc 0 6055-001 adc figure 1. for more information about the ad9973, contact analog devices, inc. via email at afe.ccd@analog.com.
ad9973 rev. spa | page 2 of 2 notes ?2006C2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06055f-0-3/07(spa)
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